It has become commonplace to connect a host computer to a flexible number of various functional devices (such as storage devices, communications devices, sensing devices, and the like that can be either removable or fixed in nature) using a plurality of conducting wires referred to as a “bus” that typically complies with well known standards. In most situations, the number of conducting wires included in the bus is not the same as the number of devices connected and therefore the number of conducting wires that constitute the bus are shared amongst any and all of the devices connected to the bus. Since all the devices share the same conducting wires within the bus and in order for the host computer to communicate with each of the devices, each device is both assigned a unique address and subsequently programmed to respond only to messages that are addressed to that unique address. In this way, multiple devices can share the same conducting wires that form the bus resulting in a substantially reduced bus size than would be otherwise be required.
Many I/O devices have an interrupt request line to signal the host they need attention. This is often used to notify the host new data is available or that a previous calculation has completed. Occasionally, each device has a separate interrupt request line to the host, so that the host can differentiate between the various sources. In this case, the host is required to have multiple interrupt request lines, which means higher cost of hardware. Occasionally, several devices share an interrupt request line to the host such that when an interrupt is signaled the host must query each device if it is the interrupt source. In this scenario, the host is required to do a search on every interrupt event which is inefficient and time consuming and increasing the latency of servicing an interrupt by the host computer resulting in more resources from the host to remember interrupt history for a longer period of time.
Therefore, it is desired to support interrupt signals from many devices without adding cost relatively to the number of devices as well as minimizing the latency associated with servicing the interrupts.